UNIVERSITY OF HERTFORDSHIRE COMPUTER SCIENCE RESEARCH COLLOQUIUM presents "Energy Efficiency and Branch Prediction" Michael Hicks (Algorithms Research Group, School of Computer Science, University of Hertfordshire) 14 November 2007 Wednesday Lecture Theatre E350 Hatfield, College Lane Campus 3 - 4 pm Coffee/tea and biscuits will be available. Everyone is Welcome to Attend Abstract: Energy efficiency in processor design has become increasingly important in recent years. With more battery operated devices utilizing high performance architectures, the energy requirements of the processor are a continual problem for hardware designers. Each new generation of embedded processor design includes more transistors and more complex logic. This only serves to exacerbate the situation. Dynamic Branch Prediction is a hardware method used to forecast the direction (and target address) of control flow instructions. This is required in modern pipelined and MII processor designs in order to achieve the optimum throughput of instructions per cycle (performance). However, the overhead for dynamic branch prediction logic is considerable, and accounts for over 10% of a processor's global power budget. This colloquium will explore the significance of power consumption in energy aware processors, and briefly discuss the sources and remedies to these problems. The energy consumption of dynamic branch prediction will be investigated, and previous approaches to increase its energy efficiency will be demonstrated. The focus of the talk will be on the 'combined algorithm', developed by our group at the University of Hertfordshire, which combines several hardware and software techniques to reduce overall power consumption of a processor by up to 6%. This power saving is achieved by decreasing the amount of energy consumed by the dynamic branch predictor during a program's execution. -------------------------------------------------- Hertfordshire Computer Science Research Colloquium http://homepages.feis.herts.ac.uk/~nehaniv/colloq